The present invention relates to a semiconductor memory device, and more particularly to a semiconductor memory device in which a memory circuit is formed of a plurality of bipolar transistors.
In a bipolar RAM integrated circuit, high-density circuit integration and speed-up of operations are more and more advancing in recent years, and a remarkable progress has been achieved. In 1978, however, the problem of the so-called ".alpha.-ray soft error" was discovered. The .alpha.-ray soft error means errors in the content of the memory storage induced by an .alpha.-particle radiated by a minute amount of uranium (U) or thorium (Th) contained in packaging material encasing a semiconductor chip of the integrated memory circuit. Namely, energy of the .alpha.-particle emitted by .alpha.-decay of uranium or thorium is distributed about a center of 5 MeV, and the maximum energy reaches 9 MeV. Accordingly, an .alpha.-particle emitted from a package also could have energy of such order. An alpha-particle of 5 MeV would travel over about 25 .mu.m through silicon, and during that period they would produce 1.4.times.10.sup.6 electron-hole pairs. Especially, if positive holes produced in an N-type collector region arrive at the junction between the N-type collector region and a P-type substrate, then they flow into the substrate as drawn by an electric field within the junction. In addition, electrons produced in the N-type collector region and electrons produced within the substrate which arrive at the collector-substrate junction and have been drawn towards the collector by the electric field within the junction, diffuse through the N-type collector region. As a result, a current flowing from the collector to the substrate is produced. Consequently, in a flip-flop type memory cell employing bipolar transistors, a collector potential of a transistor on the OFF side would be lowered, resulting in inversion of the memory cell flip-flop.
In order to obviate such disadvantages, an improved semiconductor memory device was proposed in U.S. Patent application Ser. No. 247,034 filed by M. Suzuki. In this prior invention it was intended to prevent the aforementioned inversion of memory cell caused by an .alpha.-particle by increasing a stray capacitance C.sub.T associated with a node of a collector of a transistor on the OFF side, and according to the prior invention, an additional emitter region of the transistor is provided and it is connected to the collector of the transistor. The capacitance between this additional emitter region and the base region would be connected in parallel to the capacitance between the collector region and the base region, and thereby it was contemplated to increase the overall stray capacitance C.sub.T at the node of the collector by about 20%. However, this proposed structure has a difficulty in that because of the provision of the addition emitter region, the base region is enlarged by the corresponding amount and hence the degree of circuit integration is somewhat sacrificed therefor. Moreover, there exists a device in which even with increase in the stray capacitance C.sub.T of about 20%, the improvement is still not satisfactory.